Member of Technical Staff — AI for Silicon

Headquartered in San FranciscoEngineeringFull-time

GenAlpha brings AI to silicon’s toughest challenges. We’re an early-stage startup, founded in 2024 by experts in semiconductors, ML and AI, and backed by Silicon Valley’s best VCs. AI is driving demand for more chips than ever, just as Moore’s Law runs out. Each new chip is harder to design than the last: more complex, more costly and more laborious at every node.

The role

GenAlpha builds AI Designers: agents that do analog design work in a real flow. They draw schematics and layout, and they run and debug DRC, LVS, parasitic extraction and simulation. This role builds those agents, and the silicon EDA underneath them. It sits where LLM-based agents meet the physical design of analog, RF and custom circuits. You’ll work in a dynamic, high-growth, collaboration-heavy environment, directly with our founders, our in-house circuit designers, and our customers. Those customers include some of the world’s biggest and highest-impact semiconductor designers and fabs.

What you’ll do

Expect to work on any and all of:

AI agents

Develop AI agents for novel chip design problems, from single-task assistants to hierarchical teams of agents that plan, delegate and check each other’s work
Give agents real tools: placement, routing, extraction, simulation, and physical verification (LVS, DRC). Teach them to read and act on the results
Develop automated methods to extract structured data from diverse sources, including PDK documents, design rules, datasheets, schematics and layout images
Build the knowledge systems agents draw on, such as retrieval over curated PDK documentation and graph-structured design and process knowledge
Test, evaluate and characterize AI systems on real design tasks. Grow our benchmarks and evaluation sets, and measure which models and methods do the best analog work, and at what cost

Silicon EDA

Develop novel tactics for silicon electronic design automation (EDA), focused on physical design of analog, RF and custom circuits, e.g. memory and standard cells
Optimize placement, routing, extraction, simulation and physical verification, both as standalone engines and as tools an agent can drive
Work across the silicon design flow and its data: LEF, DEF, GDS, OpenAccess, SPICE netlists, PDKs and rule decks
Work with our circuit designers to turn what an expert does and checks into software an AI can use

What we’re looking for

Proficiency in one or more of Python, TypeScript, C++ or Rust. C++ or Rust matter most for the EDA engine work
Experience building LLM-based systems: agent frameworks, tool use, RAG and GraphRAG, fine-tuning, evaluation, foundation models, ML systems
Or experience building EDA: physical design, computational geometry, verification, extraction or simulation. Ideally both, but either is a strong start
Enjoying hard, well-defined problems where the answer can be checked. Silicon either passes DRC and LVS and meets spec, or it doesn’t

Bonus points for:

Knowledge of analog, mixed-signal, RF or custom-circuit design and layout, or a silicon tape-out
Experience with reinforcement learning, evaluation harnesses or training environments
Full-stack and cloud-native B2B experience
Silicon EDA experience in general. (Don’t worry if you’d never heard of it before reading this.)

Don’t have every box ticked? Apply anyway.

Hardly anyone does. This role combines two fields that have barely overlapped until now. Most of the best people we know are deep in one and curious about the other. If you’re an AI engineer who has never opened a layout, or an EDA engineer who hasn’t built an agent yet, you’re who we’re writing this for. What matters more than any single bullet is that the work excites you and you learn fast. If that sounds like you, please don’t rule yourself out. Get in touch.

Email careers@ →

#Culture

We’re a small, all-technical team, all working at the forefront of turning AI into next-gen silicon. We’re headquartered in San Francisco and built for close collaboration. We value engineers who are unafraid to try and learn new and valuable tools, wherever they can be found. Past experience in customer-facing engineering roles is a plus. Desire to grow into engineering leadership is a plus. Desire to work in a rapidly changing, early stage startup environment is a must.

Everyone on the GenAlpha team gets the same title: Member of Technical Staff. Compensation varies with experience and fit, with competitive salaries and meaningful equity for all team members. We provide the best medical, dental, and vision coverage we can get, for both you and family. We sponsor work visas and permanent residency applications for qualified international candidates.

Req ID: R9

GenAlpha · San Francisco, CA